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MSP430F2001IPWR/MSP430F123IDWR MSP430F2001IPWR/MSP430F123IDWR//MSP430F2001IPWR/MSP430F123IDWR

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公 司: 誉诚(深圳)实业科技有限公司 
发布时间:2020年11月19日
联系人:朱小姐 女士 加为商友
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公 司:誉诚(深圳)实业科技有限公司

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    Using the On-chip VREGTo utilize the on-chip VREG, the VREGENZ pin should be tied low and the appropriate recommendedoperating voltage should be supplied to the VDDIO and VDDA pins. In this case, the VDD voltage needed bythe core logic will be generated by the VREG. Each VDD pin requires on the order of 1.2 μF (minimum)capacitance for proper regulation of the VREG. These capacitors should be located as close as possibleto the VDD pins.2.8.1.2Disabling the On-chip VREGTo conserve power, it is also possible to disable the on-chip VREG and supply the core logic voltage tothe VDD pins with a more efficient external regulator. To enable this option, the VREGENZ pin must be tiedhigh.2.8.2On-chip Power-On Reset (POR) and Brown-Out Reset (BOR) CircuitTwo on-chip supervisory circuits, the power-on reset (POR) and the brown-out reset (BOR) remove theburden of monitoring the VDD and VDDIO supply rails from the application board. The purpose of the POR isto create a clean reset throughout the device during the entire power-up procedure. The trip point is alooser, lower trip point than the BOR, which watches for dips in the VDD or VDDIO rail during deviceoperation. The POR function is present on both VDD and VDDIO rails at all times. After initial device power-up, the BOR function is present on VDDIO at all times, and on VDD when the internal VREG is enabled(VREGENZ pin is tied low). Both functions tie the XRS pin low when one of the voltages is below theirrespective trip point. Additionally, when the internal voltage regulator is enabled, an over-voltageprotection circuit will tie XRS low if the VDD rail rises above its trip point. See Section 4 for the various trippoints as well as the delay time for the device to release the XRS pin after the under-voltage or over-voltage condition is removed. Figure 2-10 shows the VREG, POR, and BOR. To disable both the VDD andVDDIO BOR functions, a bit is provided in the BORCFG register. See the "Systems Control and Interrupts"chapter of the TMS320x2806x Piccolo Technical Reference Manual (literature number SPRUH18) fordetail


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